The invention relates generally to an electronic beamsteering control system for controlling an antenna and more particularly to a phased array antenna beamsteering control system.
Recent advances in integrated circuit (IC) technology have driven active electronically controlled phased array designs from using large ceramic brick modules containing many integrated Radio Frequency (RF) circuits to highly integrated circuits known as Monolithic Microwave Integrated Circuits (MMICs). MMICs can contain the functionality (e.g. attenuation, phase, TR switching) of previous brick modules in a small, planar die and are often fabricated using Gallium Arsenide (GaAs). The MMIC die can be easily packaged in plastic and mounted to printed circuit boards. Because implementing digital logic in GaAs MMICs can be prohibitively expensive, digital controllers for these MMICs are often fabricated using silicon, which is more cost effective. These silicon-based digital controllers can then be integrated into the MMIC packaging or located in a separate package.
Over the last decade, advances in antenna technology have driven phased array antennas from 2:1 bandwidths to bandwidths greater than 10:1. Several groups, including Harris Corp., Raytheon, and Georgia Tech Research Institute have produced and demonstrated arrays with such capabilities. Although antenna designs have improved significantly over many years, highly integrated MMICs that utilize these broadband antennas for electronic steering have only recently made significant advancements in integration.
Recent developments in MMIC design have produced broadband true time delay (TTD) units that replace traditional phase shifters for electronic beam steering. The primary significance of using true time delay units over a phase shifter approach for wideband arrays is the capability of beamsteering to be independent of frequency. Because phase shifters are highly frequency dependent, the instantaneous wideband processing capabilities of an electronically steerable array (ESA) due to beam squint with frequency are limited. For this reason, broadband TTD is crucial for accurate beam pointing when performing instantaneous wideband signal processing.
For electronically steered phased arrays, there can be a large number of active elements or groups of elements that require MMICs controlled by a digital controller. MMICs can have many control inputs. A MMIC that has a 6-bit attenuator and a 6-bit phase shifter can have at least 12 bits of control. If a 256 element phased array uses this type of MMIC at every element, over 3,000 control inputs must be addressed. This wiring complexity problem is compounded when a phased array is designed for higher frequencies such as X-Band or Ku-Band which requires increasingly small element spacing (on the order of centimeters). Such highly integrated arrays have limited routing area for digital signals. For this reason, it is important to minimize routing complexity to achieve highly integrated element level control.
There are a variety of connection architectures that can be used to control a large number of elements. FIGS. 1A, 1B, and 1C show three possible prior art architectures or systems that can be used for a 256 element phased array arranged in a 16 by 16 configuration. Each figure assumes that a Field Programmable Gate Array (FPGA) is used to transmit control data to each digital controller 100 connected to a MMIC 104 and each MMIC connects to one element (not shown). For a direct approach, as shown in FIG. 1A, each controller 100 is directly connected to an FPGA 102, through a plurality of control and data lines as would be understood by one skilled in the art. Each of the controllers 100 is also coupled to a corresponding MMIC 104. Although this approach can result in a shorter time to send commands to each element, it requires a large number of routing and input/output (10) resources on the FPGA 102. The direct approach is not feasible to address a large number of antenna elements at a time.
A bus approach, as illustrated in FIG. 1C, connects groups of controllers 100 together in a common bus configuration. Here, every controller 100 has its own address and each controller in the group can receive commands directly through a common bus 106. As in FIG. 1A, each controller is coupled to a respective MMIC 104. A disadvantage of the bus architecture is that bus arbitration must occur for FPGA-to-controller communication which includes overhead resulting in a negative effect on overall update rate of each controller. In addition, bus loading becomes an issue as more and more controllers are added to the bus.
A daisy chain approach, as illustrated in FIG. 1B, connects groups of controllers 100 together so that data is passed along to the next controller in the group. This architecture routes data efficiently, but there can be timing issues and increased data traffic can increase to achieve the same update rate when compared to the direct approach.